Wednesday, January 14, 2009

Jan Issue: Now Shipping--Stratix IV, the Industry's First 40-nm FPGAs

If you cannot read this message, please click here
Inside Edge Monthly Enewsletter
  January 2009  

Monthly Spotlight

Stratix IV, the Industry's First 40-nm FPGAs, Now Shipping

Stratix® IV EP4SGX230 FPGAs, the world's first 40-nm devices, are now shipping with up to 36 high-speed serial transceivers operating at up to 8.5 Gbps. Design with the lowest power high-density, high-performance FPGAs, and get a head start on your competition today.
  Stratix IV Now Shipping


HardCopy in Practice: Case Study With Altera's ASIC
FPGA and Structured ASIC Journal: HardCopy® ASICs are pin- and package-compatible with Stratix series FPGAs, and provide a cost- effective design option for high-volume production. Learn more about the unique design flow and its practical applications in this article.

White Paper: Control Analog Output–Digital CPLD With PWM (PDF)
MAX® IIZ CPLDs, alone or with a few passive components, can use pulse-width modulation (PWM) to replace a digital-to-analog converter, allowing the devices to include LED intensity control, drive an audio speaker, and control servo position and motor speed.

Meet Bandwidth, Power, and BER Needs With 40-nm Devices (PDF)
Learn how the architecture of Stratix IV GX FPGAs with transceivers can result in high-bandwidth, low-power designs. This piece also compares jitter performance with a competitive device, and explains how the Stratix IV FPGA achieves superior bit error ratio (BER) performance.

Gain Useful FPGA Design Resources From New Site
Visit our new online board design guidelines resource center for information on board stack-up, routing guidelines, models, tools, and more to help you implement successful high-speed PCBs that integrate devices and other elements in a single location. Bookmark the page!

Software, Intellectual Property & Development Kits
Webcast: Automate System Generation Using SOPC Builder
Want to cut weeks off of your system development cycle? Watch this free webcast to learn how the SOPC Builder tool in Quartus® II software can shorten systems-on-a-chip development through automation. View today, apply what you've learned, and watch your productivity soar.

Technology & End Markets
Gain Insights Into Fieldbus and Industrial Ethernet Solutions

Industrial equipment manufacturers need to support a multitude of fieldbus and industrial Ethernet protocol standards. Learn how, with Altera partner solutions, manufacturers can support existing fieldbus protocols and industrial Ethernet technology with the same FPGA device.

White Paper: Industrial Ethernet Capability on Single Board (PDF)

Altera® FPGAs deliver multi-standard industrial Ethernet capability on a single configurable platform. Read this white paper to learn about the benefits of FPGA implementations, as well as FPGA development flow, tools, and technology for flexible industrial Ethernet solutions.

Events & Training
Sharpen Your Stratix IV GX Design Skills With New Online Classes
Altera is offering a variety of new, free online classes to enhance your skills in designing with Stratix IV GX FPGAs. Topics covered include: dynamic signal integrity management, Serial RapidIO®, PCI Express, and 10/100/1000 Mbit and 10 Gbit Ethernet. Review our classes, and sign up!

Support & Literature
White Paper: FPGAs for Home-Appliance Motor Control (PDF)
Consumers want home appliances to be smart, green, and, of course, always cheaper. This white paper shows how designers can take advantage of FPGAs to design next-generation products by integrating multiple functions, including motor control, on a single chip.

From the Forum: Simulating the Parallel Flash Loader

Altera Forum user aka_fpga_wizard asked how to simulate the parallel flash loader (PFL). Read the comments and suggestions from other Forum users that helped answer his question, then post your own advice to build your Forum reputation points today!

Altera In the News
Military Productivity Factors in Large FPGA Designs
ECN Asia: FPGAs are playing a larger role in defense electronics designs, as designers look to consolidate systems and decrease power consumption. This article examines productivity-related risk factors, and quantifies their impact on a design organization. Read it today!

Download Quartus II v8.1

Reference Designs
FPGA Design Security


TFT LCD Controller

January Crossword Puzzle

Click to enlarge

AlteraTo ensure that you receive future issues of Inside Edge, please add to your address book.

As a subscriber to the Inside Edge, you will receive a monthly email newsletter. To unsubscribe from this newsletter or subscribe to additional Altera email updates and enewsletters, please visit our Email Subscription Center.

Altera email communications include:

  • Product Announcements & Updates
  • Webcast & Video enewsletter
  • Embedded enewsletter
  • DSP enewsletter
Copyright © 1995-2009 Altera Corporation, 101 Innovation Drive, San Jose, California 95134, USA

ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.


Post a Comment
Related Posts Plugin for WordPress, Blogger...

Popular Posts