Nov Issue: Improve Productivity - Download New Quartus II Software v8.1

November 2008     www.altera.com   Monthly Spotlight Improve Productivity - Download New Quartus II Software v8.1 Now available for download, new Quartus® II software v8.1 is #1 in performance and productivity for FPGA, CPLD, and HardCopy® ASIC designs. This release features enhancements including faster compile times, faster timing closure, and additional device support. Download now!   FPGAs, CPLDs & ASICs Extended Temperature Support for Cyclone III FPGAs (PDF) Cyclone® III FPGAs now feature extended temperature support, from a range of -40°C to +125°C, ideal for many industrial applications. Order devices for immediate delivery, or view this updated technical brief, which also covers extended temperatures for MAX® II CPLDs. Design PCI Express Gen1/Gen2 Applications on Stratix IV GX FPGA The PCI Express hard IP in Stratix® IV GX FPGAs now supports PCI Express Gen1/Gen2 x1, x4, and x8 endpoint and root port applications. The industry's only 40-nm FPGA, Stratix IV GX devices feature a built-in hard IP solution that's free, low in power, and completely documented. Software, Intellectual Property & Development Kits Find Out Why Quartus II Software v8.1 Means Productivity The latest Quartus II release delivers enhanced physical synthesis on critical blocks for the highest performance and fastest timing closure.  Achieve faster board bring-up with the JTAG chain debug tool, and enjoy enhanced sampling control in SignalTap® II logic analyzer. Read more! Get a Head Start on Your Next Design With Our Embedded Portfolio Learn more about Altera's embedded portfolio, with the broadest range of soft processor cores in the industry, from the Nios II processor to architectures from ARM® and Freescale. All of the cores work seamlessly with the SOPC Builder design tool for a head start on your next design. Technology & End Markets White Paper: Creating CPLD-Only Dashboards for Automobiles (PDF) Read this paper to learn more about a radical, innovative architecture using CPLDs to eliminate the use of microcontrollers and drivers completely. Evaluate this approach as a low-cost, low-power solution for digital dashboard clusters. White Paper: Applying Graphics to FPGA-Based Solutions (PDF) The design community tends to become overwhelmed by the dual tasks of programming an FPGA and creating a human machine interface (HMI). This paper breaks down exactly how to apply an HMI program to an Altera® FPGA, including changing skin color and alpha-blending. Events & Training New Online Training: System Console Overview Learn about when and how to use the Quartus software system console, an interactive console for debugging systems over JTAG. You'll also gain insight into various types of services supported by the console, as well as tips and tricks that will make it easier to use. Sign up now! MILCOM 2008: Solving Core-to-Edge Design Challenges With FPGAs San Diego, CA, Nov. 17-19: Visit Altera at booth #643 to learn how FPGAs can enhance your military secure communications designs, enabling the core to the edge. See demos showcasing advanced wireless waveforms, low-power programmable devices, and customer applications. Support & Literature Download the Quartus II 8.1 Handbook Check out the updated handbook with information on the newly released Quartus II software v8.1. Review the handbook's chapter revision history for new information. V8.1 enhancements improve performance and further speed up timing closure. App Note: Simplify Management of Large Multi-FPGA Designs (PDF) Read this application note to learn ways to overcome challenges associated with designs incorporating multiple FPGAs. Taray's 7Circuits rules-based synthesis engine can alleviate many of the issues, simplifying multiple-FPGA design management. From the Forum: Speed Grades and Quartus II Timing Altera Forum user Ardni asked about the relationship between Quartus II timing models and device speed grade. Read the comments and suggestions from other Forum users that helped answer the question, then post your own advice to increase your Forum reputation points today! Altera in the News FPGA-Based Diagnostic Equipment for Use in Rural Communities, PLDesignLine Learn how FPGAs and soft-core embedded processors can be used to create an electronic patient diagnostic system that predicts a patient's future physiological state—a potentially vital tool in rural communities where medical care is scarce.   Featured Development Kits ViClaro II HD Video Enhancement Kit Cyclone® III FPGA Kit MAX® IIZ Dev. Kit Click to enlarge To ensure that you receive future issues of Inside Edge, please add announcements@altera.com to your address book. As a subscriber to the Inside Edge enewsletter, you will receive a monthly email newsletter. Altera respects your privacy. If you no longer wish to receive this enewsletter, please unsubscribe. Subscribe to additional Altera email communications, or view/edit all of your Altera email subscriptions including: Product Announcements & Updates Code:DSP enewsletter Embedded enewsletter Webcast enewsletter Copyright © 1995-2008 Altera Corporation, 101 Innovation Drive, San Jose, California 95134, USA ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.