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FPGAs, CPLDs & ASICs
Video: Interfacing High-Speed ADCs to Transceiver-Based FPGAs
Are you interested in the new generation of high-speed ADCs with serial interfaces? Do you believe that gigabit serial interfaces are complex? This new video shows you how easy it is to interface Linear Technology's high-speed ADCs to Altera's embedded transceiver FPGAs. Watch it today!
Webcast: Scale Packet Transport Networks to 40 Gbps Using FPGAs
Learn about flexible standard products which target packet transport applications, built with Altera® FPGAs and TPACK's Carrier Ethernet technology. You'll see how new 40-nm FPGAs are integrated into Carrier Ethernet's 40-Gbps solution, and learn about a new universal line card.
Future-Proof Design: Stratix III to Stratix IV E FPGA Migration
Design today with Stratix III FPGAs, and take advantage of cross-family migration to Stratix IV E devices. With our design guidelines, you'll be able to ship your Stratix III FPGA-based system now, and have a path to Stratix IV E density, power, and performance benefits.
Software, Intellectual Property & Development Kits
Buy Quartus II Software, Get Nios II Soft Processor at No Charge
Limited time offer: Buy Quartus® II Subscription Edition software for $2,495, and get the industry's #1 soft processor at no charge. This package provides a full license for IP functions including Nios® II, NCO, FIR, QDR II, and DDR/DDR2/DDR3 memory. Buy and save $495 today!
Get Quartus II Web Edition - No License Required
Licenses are no longer required for either Quartus II Web Edition or ModelSim-Altera Web Edition software. You'll get faster access to resources like SOPC Builder, TimeQuest, PowerPlay, and Nios II Embedded Design Suite. Download both, install, and get started!
Technology & End Markets
IXXAT Unveils Cyclone III FPGA-based Industrial Ethernet Module
Evaluate IXXAT's new Industrial Ethernet Module based on a Cyclone® III FPGA. This module is available for the Powerlink, PROFINET, Ethernet/IP, EtherCAT, and SERCOS III protocols, providing a quick, cost-efficient way to adapt your devices to various industrial Ethernet technologies.
White Paper: Cost-Effective HMIs for Home Appliances (PDF)
Cost-effective touch-based LCDs with highly interactive GUIs are now replacing the "mechanical" human-machine interfaces (HMIs) currently found on most home appliances. Discover an innovative, total solution architecture for delivering these low-cost, high-performance HMIs today.
Events & Training
Learn About Altera Resources to Accelerate Your Design Cycle 
Take this half-hour online course to quickly understand and use Altera products, collateral, and other design resources. Learn to create a secure personal altera.com account, troubleshoot common problems, find design examples and tips, and save design time. Take the class today!
Learn More About What's New in Quartus II Software v8.1
In this hour-long online course, you'll learn new features of Quartus II software v8.1, including enhancements to physical synthesis compilation times, TimeQuest templates, DDR/DDR2/DDR3 memory controller support, and TimeQuest templates. Take the class today!
Support & Literature
White Paper: Designing Multipoint Touch Screens With CPLDs (PDF)
Recent handheld devices with touchscreens have transformed the way that consumers expect to interact with products. To simplify and accelerate the development of such sophisticated interfaces—without sacrificing time, budget, or power needs—design with zero-power MAX® IIZ CPLDs.
General Purpose Serial Communication Interface With JTAG (PDF)
Did you know that you can use JTAG as a general purpose communication interface? Build custom applications to dynamically control signals for debug. This Megafunction User Guide includes new design examples for real-time control of FPGA designs. Click the link to find out more!
App Note: Nios II Compact Configuration - Cyclone III FPGA (PDF)
See how you can reduce costs and simplify your Cyclone III design by eliminating the need for an external configuration controller. This app note discusses how to use a Nios II processor-based configuration system to manage one or more configurations from flash.
App Note: Generate SDC Directly From a Timing Diagram (PDF)
EMA Design Automation's TimingDesigner software brings graphical interface timing analysis to Altera through new SDC generation and TimeQuest integration. This app note from our partner EMA shows how you can easily constrain and analyze your FPGA interfaces.
From the Forum: Combining JTAG and AS Configuration Scheme
Altera Forum user tqvsrs asked about the JTAG issue when combining JTAG and active serial (AS) configuration scheme. Read the comments and suggestions from other Forum users that helped answer the question, then post your own advice to build your Forum reputation points today!
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